Setting up
·
P406 is set to determine the maximum voltage attained in the ATTACK
curve,
· P400 is set to define the maximum SUSTAIN level that can be
set by the panel control P402
For general synthesiser compliancy, control signals should be from 0V to +10V. To comply with this the voltage at SP should be set to 10V by adjusting P400. The reader should note that, in this case, when P402 (SUSTAIN LEVEL) is set to maximum, there will be no DECAY curve and the envelope will follow an ASR curve. Readers may wish, therefore, to set the SUSTAIN LEVEL to a slightly lower level than this thus ensuring that the DECAY portion of the curve has a positive action.
With P400 set we can now set P406 (ATTACK PEAK) which determines the maximum voltage that the ATTACK curve will reach before switching to the DECAY portion of the curve.
Set P405 (ATTACK), P403 (DECAY) and P404 (RELEASE) to minimum and P402 (SUSTAIN) to maximum. The following steps will then need to be repeated until the signal at ENVELOPE OUT rises to the desired ATTACK PEAK level and then immediately starts to decay:-
1. generate and
maintain a GATE signal, the ENVELOPE OUT signal should rise (ATTACK)
to a maximum value and then immediately start to drop (DECAY)
2. adjust P406 until the ENVELOPE OUT signal switches to decay mode
when it reaches 10V (or your desired ATTACK PEAK level),
3. remove the GATE signal and allow ENVELOPE OUT to drop,
4. repeat steps 1 to 3 until the signal at ENVELOPE OUT rises to the
desired ATTACK PEAK level and then immediately starts to decay.
The aim of these
steps is set a level at the output of P406 which will cause the flip-flop,
built around U404, to go from a Logic `0' state to a Logic `1' state
at the same time that the envelope curve reaches the desired ATTACK
PEAK level.